The core clock speeds ranged from , I worked with every version over a 7 year period 1997-2004. They weren't the fastest processors around but it was a complete system in one neat package. The wafer sort test solution execution time on an was around 2.1s and the compiled test solutions were 2.2g to 2.5g In size, mostly functional test patterns. The wafer sort probe card was a sight to behold. IIRC it was around 32 layers with a lot of ground planes. Final test was also on the LTX Delta STE and test time was slighty faster, around 2.0s. Each 0.35u process 8" wafer produced around 32 testable die. These were big chips, at least they were the biggest I ever worked with.
The core clock speeds ranged from [120mHz with the GX to 266mHz with the GXm](https://en.m.wikipedia.org/wiki/MediaGX), I worked with every version over a 7 year period 1997-2004. They weren't the fastest processors around but it was a complete system in one neat package. The wafer sort test solution execution time on an [LTX Delta STE](https://www.edn.com/national-semiconductor-purchases-ltx-delta-stes-to-test-systems-on-a-chip/) was around 2.1s and the compiled test solutions were 2.2g to 2.5g In size, mostly functional test patterns. The wafer sort probe card was a sight to behold. IIRC it was around 32 layers with a lot of ground planes. Final test was also on the LTX Delta STE and test time was slighty faster, around 2.0s. Each 0.35u process 8" wafer produced around 32 testable die. These were big chips, at least they were the biggest I ever worked with.
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